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IWDG

General Information

• Timer is always free-running, since it’s independent, it’s able to run in standby and stop modes
• Reset the value of the watchdog value register reaches less than 0
• We can write 0x0000 CCCC to IWDG key register it’ll start counting from 0xFFF, when it teaches 0x000 it’ll generate reset signal IWDG_RESET
• We can write 0x0000 AAAA to IWDG key register, it’ll write whatever is in IWDG_RLR register to the counter and the timer reset doesn’t get generated

Configuring the IWDG when no reset window needed

1. Write 0x0000 CCCC
2. Write 0x0000 5555 in the IWDG key register, to enable register access
3. Write the prescaler register (use /64, which is 0b100)
4. Write the reload register
5. Wait for SR to be 0x00
6. Refresh counter value with RLR value